Saturday, 13 October 2018

VLSI

VLSI Design & Technology

Pune University study material

  •   Design and Implementation of 4 bit ALU using VHDL
  • Design and Implementation of Universal Shift Register using VHDL
  • Design and Implementation of FIFO Memory using VHDL
  • Design and Interfacing of LCD With FPGA
  • Design of CMOS Inverter, NAND, NOR, Half Adder
  • Design of CMOS 2:1 Multiplexer
  • Design of CMOS single bit SRAM.
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